Title: Professor
Subject: Microelectronics and Solid State Electronics
Phone: +86-021-62511070
Fax: +86-021-62524192
Address: 865 Changning Road, Shanghai, China


2005 First Prize of Shanghai Science and Technology Progress Award

2006 First Prize of National Scientific and Technological Progress Award

2007 Outstanding Science and Technology Achievement Prize of Chinese Academy of Sciences


Prof. Jing Chen received her Ph.D degree from Shanghai Institute of Microsystem and Information Technology (SIMIT) of Chinese Academy of Sciences (CAS) in 2002. From 2006 to 2011, she worked as an Associate Professor at State Key Laboratory of Functional Materials for Informatics of SIMIT. From 2012 to present, she served as a Professor in SIMIT. Her research interests are focused on microelectronic devices and materials, and currently main research on "SOI device and modeling".

Prof. Jing Chen is the reviewer of international journals such as IEEE Transactions on Electron Devices, Thin Solid Films, Physica etc. As a project manager responsible for the sub-topics of the Major National project, Major project of CAS, the National Natural Science Foundation project, as well as the Basic Research project of Shanghai. Recently, as a leading scientist, Prof. Chen, together with her colleagues, first established a complete model database of 0.13 um SOI process in China, which was used and verified by SOI Library and ASIC chips with several companies and institutes. Meanwhile, the team developed new TDBC SOI devices which efficiently suppressed the floating-body effect in partially depleted SOI technology. Novel floating body/gate cells were fabricated with 0.13 um SOI technology which showed excellent endurance, fast write speed and low power consumption. Prof. Chen cultivated more than 10 graduate students for Ph.D degree and M.S degree, published more than 60 papers in the famous international magazine such as IEEE Electron Device Lett., Appl. Phys. Lett, etc., and applied more than 60 patents, including 26 authorized patents (8 US patents).


1. Weiwei He, Jing Chen*, Qingqing Wu, Jiexin Luo, Zhan Chai, Jianqiang Huang, Xi Wang, Floating Body Gate Cell with Fast Write Speed for Embedded Memory Applications, Electronics Letters, 52(12), (2016) 1011

2. Jianqiang Huang, Weiwei He, Jing Chen*, Jiexin Luo, Kai Lu, Zhan Chai, New Method of Total Ionizing Dose Compact Modeling in Partially Depleted Silicon-on-Insulator MOSFETs, Chinese Physics Letters, 33(9), (2016) 82

3. Kai Lu, Jing Chen*, Jiexin Luo, Weiwei He, Jianqiang Huang, Zhan Chai, and Xi Wang, Effects of back gate bias on radio-frequency performance in partially depleted silicon-on-inslator nMOSFETs, Chinese Physics B, 24(8), (2015) 088501

4. Kai Lu, Jing Chen*, Jiexin Luo, Jun Liu, Qingqing Wu, Zhan Chai, and Xi Wang, Improvement of RF Performance by Using Tunnel Diode Body Contact Structure in PD SOI nMOSFETs, IEEE Electron Device Letters, 35(1), (2014) 15

5. Jiexin Luo, Jing Chen*, Zhan Chai, Kai Lu, Weiwei He, Yan Yang, En Xia Zhang, Daniel M. Fleetwood, Xi Wang, Total Dose Effects in Tunnel-Diode Body-Contact SOI nMOSFETs, IEEE Transaction on Nuclear Science, 61(6), (2014) 3018

6. Qingqing Wu, Jing Chen*, Zhichao Lu, Zhenming Zhou, Jiexin Luo, Zhan Chai, Tao Yu, Chao Qiu, Le Li, Albert Pang, Xi Wang, and Jerry G. Fossum, Experimental Demonstration of the High-Performance Floating-Body/Gate DRAM Cell for Embedded Memories, IEEE Electron Device Letters, 33(6), (2012) 743

7. Jiexin Luo, Jing Chen*, Qingqing Wu, Zhan Chai, Jianhua Zhou, Tao Yu, Yaojun Dong, Le Li, Wei Liu, Chao Qiu, and Xi Wang, A Tunnel Diode Body Contact (TDBC) Structure for High-Performance SOI MOSFETs, IEEE Transactions on Electron Devices, 59(1), (2012) 101

8. Jing Chen*, Jiexin Luo, Qingqing Wu, Zhan Chai, Tao Yu, Yaojun Dong, Xi Wang, A Tunnel Diode Body Contact Structure to Suppress the Floating-Body Effect in Partially Depleted SOI MOSFETs, IEEE Electron Device Letters, 32(10), (2011) 1346