MANUFACTURING METHOD OF EPITAXIAL DIODE ARRAY WITH DUAL SHALLOW TRENCH ISOLATIONS
Name: |
MANUFACTURING METHOD OF EPITAXIAL DIODE ARRAY WITH DUAL SHALLOW TRENCH ISOLATIONS |
The patent category: |
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Application number: |
PCT/CN2011/076238 |
Application date: |
2011/6/23 |
First inventor: |
ZHANG, Chao |
Other inventors: |
SONG, Zhitang;WAN, Xudong;LIU, Bo;WU, Guanping;ZHANG, Ting;YANG, Zuoya;XIE, Zhifeng |
Other note: |
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