Patents
Name Application Number
METHOD FOR MODELING SOI FIELD-EFFECT TRANSISTOR SPICE MODEL SERIES PCT/CN2011/080144
BODY-TIED STRUCTURE SOI FIELD-EFFECT TRANSISTOR EQUIVALENT ELECTRICAL MODEL AND MODELING METHOD PCT/CN2011/080143
TCAD SIMULATION CALIBRATION METHOD OF SOI FIELD EFFECT TRANSISTOR PCT/CN2011/080076
POWER MEASUREMENT DEVICE AND METHOD FOR PULSE LASING TYPE TERAHERTZ QUANTUM CASCADE LASER PCT/CN2011/079039
METHOD FOR PREPARING GRAPHENE NANO BELT ON INSULATING SUBSTRATE PCT/CN2011/078070
HEXAGONAL BORON NITRIDE SUBSTRATE HAVING STEPS OF SINGLE ATOM LAYER, PREPARATION PROCESS AND USE THEREOF PCT/CN2011/078061
METHOD FOR PREPARING HIGH MIGRATION RATE DUAL CHANNEL MATERIAL BASED ON SOI SUBSTRATE PCT/CN2011/077580
EPITAXIAL GROWTH METHOD FOR NiSiGe USING INSERTED Al LAYER PCT/CN2011/077528
CHEMICAL MECHANICAL POLISHING LIQUIDS PCT/CN2011/076387
EPITAXIAL GROWTH METHOD OF RESTRAINING THE SELF-DOPING EFFECT EFFECTIVELY PCT/CN2011/076425
DATA READOUT CIRCUIT OF PHASE CHANGE MEMORY PCT/CN2011/076315
PHASE-CHANGING MEMORY STRUCTURE HAVING LOW-K DIELECTRIC THERMAL INSULATION MATERIAL AND METHOD FOR THE SAME PCT/CN2011/076309
AL-SB-TE SERIES PHASE CHANGE MATERIAL USED FOR PHASE CHANGE MEMORY AND METHOD THEREOF PCT/CN2011/076300
PHASE CHANGE MEMORY CELL AND MANUFACTURE METHOD THEREOF PCT/CN2011/076239
MANUFACTURING METHOD OF EPITAXIAL DIODE ARRAY WITH DUAL SHALLOW TRENCH ISOLATIONS PCT/CN2011/076238