Patents
Name Application Number
MOS STRUCTURE WITH SUPPRESSED SOI FLOATING BODY EFFECT AND MANUFACTURING METHOD THEREOF 12937360
METHOD OF REDUCING FLOATING BODY EFFECT OF SOI MOS DEVICE VIA A LARGE TILT ION IMPLANTATION 12937258
DRAM CELL UTILIZING FLOATING BODY EFFECT AND MANUFACTURING METHOD THEREOF 12937257
DRAM CELL UTILIZING FLOATING BODY EFFECT AND MANUFACTURING METHOD THEREOF 12934745
HYBRID ORIENTATION INVERSION MODE GAA CMOSFET 12810740
HYBRID MATERIAL INVERSION MODE GAA CMOSFET 12810694
HYBRID MATERIAL ACCUMULATION MODE GAA CMOSFET 12810648
HYBRID MATERIAL INVERSION MODE GAA CMOSFET 12810619
HYBRID MATERIAL ACCUMULATION MODE GAA CMOSFET 12810594
HYBRID ORIENTATION ACCUMULATION MODE GAA CMOSFET 12810574
Preparation Method of Graphene Nanoribbon on h-BN 14803371
Preparation method of Large Size III-V Heterogeneous Substrate PCT/CN2017/094041
Preparation method of InP Thin Film Heterogeneous Substrate PCT/CN2017/094038
Three-dimensional memory readout circuit and method PCT/CN2017/081816
READ CIRCUIT OF STORAGE CLASS MEMORY PCT/CN2016/096649